Hamdi Abdelbagi
Hamdi Abdelbagi
Hamdi Abdelbagi
abdelbagih1@udayton.edu
- Ph.D. Electrical and Computer Engineering, University of Dayton
- Master of Science in Electrical Engineering, Wright State University, 2007
- Bachelor of Science in Electrical Engineering
- Current Position: Digital Designer Engineer at Pole/Zero Corporation
- Research Interest: Radar signal processing, radar image processing and hardware design
- Skills Profile: Experience in the computer and electrical engineering fields. Ability to successfully implement projects with digital design in the electrical engineering field. Experience designing VHDL/Verilog blocks for CPLD/FPGA. Application of power electronics and electromagnetic. Full understanding of electronics lab equipment for testing of products designed.
Professional
Pole Zero Corporation, Cincinnati, OH
Digital Design Engineer, March 2013 – Present
- Develop embedded control algorithms, architecture and code.
- Integral involvement in all phases of hardware and firmware development, including digital control module design, architecture, coding, simulation, module testing, system testing, and production support.
- FPGA/CPLD design and VHDL coding for embedded applications.
- Test firmware compliance to requirements, verification of functionality and performance using Pole/Zero hardware and commercial equipment such as in-circuit emulators, logic analyzers, etc.
- Full product development life cycle (architecture, design, verification, integration & support) of embedded control circuitry and firmware.
Apogee Applied Research, Beavercreek, OH
FPGA/Hardware Engineer, December 2011 – March 2013
- Responsible for firmware initial architecture design, development, test, integration, and releasing updates and PCB design as part of a multidisciplinary team working on signal processing acceleration equipment.
- Generate and read schematics for mixed signal designs, oversee PCB layout, and verify initial PCB designs.
- Implement large signal processing designs, firmware interfaces to various IO technologies such as 10Gb Ethernet, high-speed A/D converters and USB, instantiating various RAM technologies, channels mux, frequency discriminator, filters, PCI Express, and test simulations.
- Support the systems, software, QA, and Customer Support teams in quickly resolving issues as well as planned new development releases.
Sierra Nevada Corporation, Beavercreek, OH
Digital Design/Testing Engineer, February 2008 – October 2010
- CPLD & FPGA designer with VHDL/Verilog.
- Design VHDL/Verilog blocks for ELINT (Electronic Intelligence).
- Translate system level requirements into FPGA and board level designs that are components of high-speed data acquisition and digital signal processing products.
- Test products designed in the lab.
Wright State University, Dayton, OH
Graduate TA, August 2007 – March 2008
- Completed Graduate Teaching Training course at WSU.
- Taught 2 sections of engineering labs per quarter.
- Responsible for running the lab, instructing, and consulting with students.
Thesis, August 2006 – July 2007
- Derived analytical equations from Maxwell’s Equations. These equations were plotted in MATLAB to numerically investigate the skin and proximity effects of an AC current conducting through rectangular metallic plates.
- Published on-line.
- Taught in WSU’s Power Electronics graduate course.
Key activities and continuing education
- Institute of Electrical and Electronic Engineering
- The National Management Honorary and Professional Society (SIE)
- The National Scholars Honor Society
- Doulos Comprehensive VHDL, Doulos, Baltimore, MD, June 2008
- Design for Performance/Advance FPGA, Bottom Line Technology, Columbia, MD, February, 2009
- Programmable Solutions for Today and Tomorrow's Design Challenges, Xilinx, Dayton, OH, April, 2009
COMPUTER PROGRAMS AND LANGUAGES
- VHDL, Xilinx/Altera/Lattice, Program Mgr, Cadence
- Verilog, Edge CAM, Matlab/Simulink, Multisim
- C/C++ Programming, Autodesk, Unix/Linux, Magic
- Microsoft Applications, AutoCAD, Windows, Pspice
- Fortran Programming, VisualBasic.Net, WinEdit, Hspice
- Python, Web Design, LaTeX, B2 Logic 3.1.0
Education, projects, presentations
University of Dayton, Dayton, OH
- Doctorate of Philosophy in Engineering
Wright State University, Dayton, OH
- Master of Science in Electrical Engineering, August 2007
- Thesis: Skin and Proximity Effects in Two Rectangular Plates, GPA 3.8/4.0
Wright State University, Dayton, OH
- Bachelor of Science in Electrical Engineering, June 2004
- GPA 3.3/4.0 in Major
RELEVANT COURSES
- Digital Systems Design
- Electronic Circuits /Devices Digital Signal Processing
- Power Electronics
- Radar System
- VLSI Design
- Digital Spread Spectrum
- Control Systems
- Intro to CAD/CAM
- Microwave Engineering
- PLD & FPGA Design
- Signal Processing Linear Systems
- Communication Theory
- Digital/Analog Communication
ADDITIONAL COURSE PROJECTS
Senior Design Project, Spring 2004
Digital Down Converter in VHDL/FPGA
- The module implements a digital downconverter (DDC) to tune an IF signal to baseband. The complex output of the demixer is filtered by polyphase decimators to get the desired output sample rate at baseband.
- Design of a 16-bit microprocessor using Xilinx Program Manager, Summer 2003
- Designed an Algorithmic Logic Unit, Control Unit, and Data Unit
- Developed Operational Codes to be programmed to the ROM
PRESENTATION EXPERIENCE
- "Skin and Proximity Effects in Two Rectangular Plates” Thesis defense, Wright State University, August 2007
- "The Nature and Techniques of Spread Spectrum” Digital Spread Spectrum Class, Wright State University, May 2006
- "Determining Audio Sound Quality by Calculating Sound Pressure Level with MATLAB” Senior Design Presentation, Wright State University, June 2004
- "Detailed Technical Description and Functionality of (AC / DC) Motor” Technical Writing Class, Wright State University, March 2004
Personal
- Security Clearance
Collateral: Cleared for Secret level based on NACLC completed on 6/24/2008.
SCI: Cleared for Top Secret information and granted access to sensitive compartmented information based on single scope background investigation completed on 12/10/2008. - Self-motivated, detail oriented and team player
- Honest and hard working
- U.S. Citizen
- Problem solver
- Fluent in Arabic and English, spoken and written
- Artist